Title :
The design of high gain amplifier with transformer feedback combination
Author :
Suk-hui Lee;Ki-Jin Kim;K.H. Ahn;Sung-il Bang
Author_Institution :
Convergence Communication Components Research Center, Korea Electronics Technology Institute, Seongnam-si, South Korea
Abstract :
In this paper, we present a low power consumption and high gain low noise amplifier using transformer feedback to neutralize the gate-source and gate-drain overlap capacitance of a FET. It is a single-ended amplifier designed in 65nm CMOS technology for 60 GHz transceiver. This LNA achieves a simulated gain of 10.64 dB, noise figure of 3.10 dB at 60 GHz.
Keywords :
"Logic gates","Gain","CMOS integrated circuits","Noise figure","Bandwidth","Inductors","Impedance matching"
Conference_Titel :
Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2015 IEEE
DOI :
10.1109/EDAPS.2015.7383677
