TCAM-based flow lookup design on FPGA and its applications

TCAM is now emulated using FPGAs and based on memory known as RAM or register. Most of them are made just using register- or RAM-based resource individually when mapped to FPGA hardware. This paper presents a 4×4 flexible Basic-TCAM architecture that can be flexibly designed based selectively on memory-based or register-based FPGA resource or both of them in combined manner. In addition, it can also allow a scalable architecture. A wider and deeper TCAM of size 512×36 built based on it seizes only 73,728 bits and 1,503 logic utilization and supports competitive search latency of 1 clock cycle over Altera Cyclone V FPGA. A typical flow lookup design based on this Basic-TCAM architecture uses a TCAM of size 4×16 and a simple parser to do a flow lookup. This design application is then taken place in a simple VLAN-based switch system for further feasible application of the TCAM in this work.