An improved hardware design for matrix inverse based on systolic array QR decomposition and piecewise polynomial approximation

Reconstructive signal processing algorithms involve complex computations, where matrix inversion is one of the most complex operations required by several signal processing applications (e.g., image processing or MIMO systems in wireless communication transmission). Currently, QR decomposition implemented with systolic arrays have been proposed in recent studies; however, the internal structure of the boundary cell requires complex operations such as square root and its reciprocal. The challenge of this paper consist in the improvement of a hardware architecture for matrix inversion. This improvement is achieved using systolic arrays and polynomial approximation techniques. Particularly, the inverse square root operation and its reciprocal are efficiently implemented with a piecewise polynomial approximation architecture in a systolic array structure achieving significant gains in area and time performance.