DocumentCode
3746083
Title
Low-voltage 9T FinFETSRAM cell for low-power applications
Author
Farshad Moradi;Mohammad Tohidi
Author_Institution
Integrated and Electronics Lab., Department of Engineering, Aarhus University, Aarhus, Denmark
fYear
2015
Firstpage
149
Lastpage
153
Abstract
In this paper, a novel multi-threshold 9T-SRAM cell using FinFET technology with improved read and write margins in comparison with the standard 6T-SRAM cell is proposed. By the use of this bit-cell at supply voltage of 200mV (800mV), read and write margins are improved by 92% (97%) and 2X (40%), respectively. The proposed design operates at supply voltages lower than 300mV that results in a 3X lower power consumption compared to the standard 6T-SRAM cell.
Keywords
"SRAM cells","FinFETs","Standards","Computer architecture","Power demand"
Publisher
ieee
Conference_Titel
System-on-Chip Conference (SOCC), 2015 28th IEEE International
Electronic_ISBN
2164-1706
Type
conf
DOI
10.1109/SOCC.2015.7406929
Filename
7406929
Link To Document