• DocumentCode
    3746091
  • Title

    A multi-level collaboration low-power design based on embedded system

  • Author

    Xiang Wang;Lin Li;Longbin Zhang;Weike Wang;Rong Zhang;Yi Zhang;Quanneng Shen

  • Author_Institution
    School of Electronic and Information Engineering, Beihang University Beijing 100191, China
  • fYear
    2015
  • Firstpage
    186
  • Lastpage
    190
  • Abstract
    This essay provides a multi-level collaboration low-power design based on embedded processor, builds SoC (System-on-Chip) and designs a low-power SoC by register level, system level and gate level. The designed clock gating module, power management module and system program coordination can be used to realize the sleep and wake up functions on SoC. In order to realize a multi-level collaboration low-power designing, gating clock circuit can be used in circuit designing.
  • Keywords
    "Clocks","Power demand","Registers","Logic gates","Latches","System-on-chip","Software"
  • Publisher
    ieee
  • Conference_Titel
    System-on-Chip Conference (SOCC), 2015 28th IEEE International
  • Electronic_ISBN
    2164-1706
  • Type

    conf

  • DOI
    10.1109/SOCC.2015.7406937
  • Filename
    7406937