DELPHI style extraction and validation of compact model for a multichip module package

DELPHI style compact model generation for single chip packages is an electronics industry standard proposed by the JEDEC council. Such compact network models are boundary condition independent and ensure that junction temperatures are predicted within 10% [7] compared to the predicted detailed package temperatures. These models replace detailed modeling of packages in system level CFD simulations. With the recent trend of packing more and more functionality onto a single package, multi-chip modules (MCM) kind of packages are becoming more prevalent. MCM packages have more than one functional block (chip) and the DELPHI methodology is no longer applicable directly to MCM packages. In this paper, an extended method has been proposed to extract DELPHI style network models for a multi-chip module packages. ANSYS Icepak is used to model and validate the new method by comparing its temperature predictions with a detailed package. The proposed method uses a combination of the JEDEC proposed method and a linear superposition technique to predict junction temperatures of MCM packages. Linear superposition method takes in to account the interdependency of chips with each other, whereas the DELPHI method is based on a boundary condition-independent technique. Also, an additional study is also carried out to understand the effect of proximity of chips and its impact on the comparisons with the detailed CFD model.