Title :
Circuit influences on COMFET™ (IGT) dynamic latching current
Author :
Harold R. Ronan;C. Frank Wheatley
Author_Institution :
RCA Solid State Division, Mountaintop, PA 18707, United States
fDate :
6/1/1986 12:00:00 AM
Abstract :
Terminal measurements are made to verify that latching varies with gate drive resistance and occurs during turn off. dv/dt is varied from 1600 to 300 V/us with no impact on latch. A time-displaced turn-off current pulse demonstrates that latching occurs at very low drain voltages, suggesting a tailored gate drive. A brief discussion of device structure explains the observations.
Keywords :
"Logic gates","Latches","Compounds","Field effect transistors","Anodes","Conductivity","Object recognition"
Conference_Titel :
Power Electronics Specialists Conference, 1986 17th Annual IEEE
Print_ISBN :
978-9-9963-2327-0
DOI :
10.1109/PESC.1986.7415548
