FPGA Based Implementation Scenarios of TEA Block Cipher

Transmission of sensitive data over some channel is a highly security constrained scenario and thus demands the application of some encryption algorithm. It is better to implement the algorithm in hardware as compared to software due to better computational speed and memory usage. Tiny Encryption Algorithm known as TEA block cipher is a light-weight and efficient cryptographic algorithm, well suited for wireless communication systems. This paper presents the successful implementation of TEA on FPGA for different design approaches to analyze the performance and resource utilization against each design approach.