A selectable-gain CMOS frontend for pulse shape analysis in Double Sided Silicon microstrip detectors first

Aim of this work is the design and simulation of a selectable-gain charge preamplifier to be coupled to the Double-Sided Silicon Strip Detectors of the Femtoscope ARray for Correlation and Spectroscopy, named FARCOS. FARCOS features high angular and energy resolution and able to serve in several nuclear physics experiments both with stable and with radioactive beams thanks to its versatility and modularity. The most demanding requirements on the frontend are related to the required pulse-shape analysis (PSA) capability that allows the identification of particles stopping even in the first detection layer of each telescope and to the large dynamic range. In order to apply the PSA the front-end has to amplify the whole waveform without significant shape distortions. To ease the interconnection with the detector an 8-channel version is designed. The chosen technology is AMS C35B4C3, featuring a minimum channel length of 0.35μm and a 3.3 V supply voltage. In this work we present the design and post-layout simulation of the single channel and the multichannel version of the front-end - with a special emphasis on the sizing of the transistors to optimize the noise performance.