Quality factor improvement of on-chip inductors for HIPERLAN RFIC by micromachining

Author

Chiu, Hong-Wei ; Chen, Hsiao-Chin ; Lu, Shey-Shi

Author_Institution

Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan

Volume

2

fYear

2001

fDate

3-6 Dec. 2001

Firstpage

859

Abstract

The enhancement of quality factor of on-chip inductors by micromachining for HIPERLAN application is presented. A process for the selective removal of the substrate underneath the on-chip inductors is also developed. The fabrication steps consist of anisotropic wet etching of the semiconductor substrate under the inductors followed by laser stripping of passivation layers to expose the pads for IC testing. Experimental results show that the quality factors of the micromachined inductors can be increased by up to 50% around 5 GHz, which is suitable for HIPERLAN applications.

Keywords

CMOS integrated circuits; Q-factor; etching; field effect MMIC; inductors; integrated circuit testing; laser beam machining; micromachining; 0.35 micron; 5 GHz; HIPERLAN RFIC; IC testing; RF CMOS technology; anisotropic wet etching; laser stripping; laser trimming; micromachined inductors; micromachining; on-chip inductors; passivation layers; quality factor improvement; selective substrate removal; semiconductor substrate; Anisotropic magnetoresistance; Inductors; Micromachining; Optical device fabrication; Passivation; Q factor; Radiofrequency integrated circuits; Semiconductor lasers; Substrates; Wet etching;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Conference, 2001. APMC 2001. 2001 Asia-Pacific

Conference_Location

Taipei, Taiwan

Print_ISBN

0-7803-7138-0

Type

conf

DOI

10.1109/APMC.2001.985505

Filename

985505