Optical and electronic combined buffer architecture for optical packet switches

Optical packet switch systems with fiber delay line (FDL) buffers provide high-throughput, bit-rate independent, energy-efficient, and transparent forwarding. However, the FDL buffer experiences scalability issues and, thus, cannot accommodate a large amount of network traffic. In this paper, we first investigate network performance of the FDL buffer. Due to the discrete-time nature of the FDL buffer, throughput of Transmission Control Protocol (TCP) applications is not improved drastically in spite of the addition of extra FDLs. Then, we propose optical and electronic combined buffer architecture. The combined buffer is composed of an FDL buffer and a supplementary electronic buffer having power management functions according to its occupancy. The combined buffer uses only the FDL buffer and keeps its energy efficiency when traffic volume is low. In doing so, this architecture reduces power consumption to 70% of that of a buffer composed only of electronic devices under non-peak traffic. As the traffic volume increases, the combined buffer turns on its electronic devices and accommodates the increased traffic. Simulation results reveal that the proposed buffer architecture obtains 1.5 times larger throughput than that of the existing FDL buffer against suddenly increased traffic. Finally, we show that the supplementary electronic components have to be ready to use in less than 300 ms.