A digitally controlled CMOS RF power amplifier

Author

Hella, Mona M. ; Ismail, Mohammed

Author_Institution

Dept. of Electr. Eng., Ohio State Univ., Columbus, OH, USA

Volume

2

fYear

2001

fDate

2001

Firstpage

833

Abstract

This paper presents the design, and implementation of an RF power amplifier in a standard 0.35 μm CMOS technology. The amplifier is capable of delivering 16.5 dBm of output power at 1.85 GHz using a 3.3 V supply with an overall measured power added efficiency (PAE) of 30%. The power amplifier employs a class AB output stage, which represents a compromise between efficiency and linearity. Measurement results of the fabricated chip are included

Keywords

CMOS analogue integrated circuits; UHF integrated circuits; UHF power amplifiers; digital control; integrated circuit design; integrated circuit measurement; 0.35 micron; 1.85 GHz; 30 percent; CMOS technology; RF power amplifier design; RF power amplifier implementation; digitally controlled CMOS RF power amplifier; efficiency; linearity; output power; power added efficiency; power amplifier class AB output stage; power amplifier measurement; supply voltage; CMOS technology; Digital control; High power amplifiers; Linearity; Power amplifiers; Power generation; Radio frequency; Radiofrequency amplifiers; Semiconductor device measurement; Transceivers;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2001. MWSCAS 2001. Proceedings of the 44th IEEE 2001 Midwest Symposium on

Conference_Location

Dayton, OH

Print_ISBN

0-7803-7150-X

Type

conf

DOI

10.1109/MWSCAS.2001.986316

Filename

986316