Title :
NMOS contact engineering for CMOS scaling
Author :
K.V. Rao;Chi-Nung Ni;Fareen Adeni Khaja;Xuebin Li;Shashank Sharma;Raymond Hung;Michael Chudzik;Bingxi Wood;Kyu-Ha Shim;Todd Henry;Naushad Variam
Author_Institution :
Applied Materials, 35 Dory Rd., Gloucester, MA 01930, USA
fDate :
6/1/2015 12:00:00 AM
Abstract :
The 10-7 nm CMOS nodes require that ρc be reduced to <; 2E-9 Ω.cm2. Fermi level for most metals is pinned at mid-gap, resulting in a challenge to decrease SBH. There are several implant solutions, such as thermal implants, that can be leveraged to benefit the FinFET doping of SDE, SD and contact module for scaled CMOS.
Keywords :
"Implants","Silicides","High definition video","Annealing","Films","Silicon","Doping"
Conference_Titel :
Junction Technology (IWJT), 2015 15th International Workshop on
DOI :
10.1109/IWJT.2015.7467093
