• DocumentCode
    3774599
  • Title

    Intel® Xeon Phi coprocessor (codename Knights Corner)

  • Author

    George Chrysos

  • fYear
    2012
  • Firstpage
    1
  • Lastpage
    31
  • Abstract
    This article consists of a collection of slides from the author´s conference presentation on Intel´s Xeon Phi (Knights Corner] coprocessor. Some of the specific topics discussed include: the special features and applications supported by Xeon Phi; Intel´s integrated core architecture; coprocessor system specifications and architecture; memory management; media streaming capabilities; and system performance evaluations.
  • Keywords
    "Optimization","Microprocessors","Network architecture","Parallel processing","Mission critical systems","Instruction sets"
  • Publisher
    ieee
  • Conference_Titel
    Hot Chips 24 Symposium (HCS), 2012 IEEE
  • Type

    conf

  • DOI
    10.1109/HOTCHIPS.2012.7476487
  • Filename
    7476487