DocumentCode
3775173
Title
Intel® QuickPath interconnect overview
Author
Robert Safranek
Author_Institution
Intel, USA
fYear
2009
Firstpage
1
Lastpage
27
Abstract
Presents a collection of slides covering the following topics: Intel QuickPath Interconnect; platform configuration; physical layer; link pair; transmitter discrete-time linear equalizer; coefficient search; link layer; virtual channel mapping function; message class; command insert interleave; routing layer; protocol layer; and configuration agent.
Keywords
"Topology","Protocols","Routing","Intellectual property","Warranties","Program processors","Current measurement"
Publisher
ieee
Conference_Titel
Hot Chips 21 Symposium (HCS), 2009 IEEE
Type
conf
DOI
10.1109/HOTCHIPS.2009.7478336
Filename
7478336
Link To Document