DocumentCode :
3775316
Title :
Next generation SPARC processor cache hierarchy
Author :
Ram Sivaramakrishnan;Sumti Jairath
fYear :
2014
Firstpage :
1
Lastpage :
28
Abstract :
This article consists of a collection of slides from the author´s conference presentation on the special features, system design and architectures, processing and memory management capabilities, and targeted markets for Oracle´s SPARC processor products.
Keywords :
"Program processors","Storage management","Cache memory"
Publisher :
ieee
Conference_Titel :
Hot Chips 26 Symposium (HCS), 2014 IEEE
Type :
conf
DOI :
10.1109/HOTCHIPS.2014.7478828
Filename :
7478828
Link To Document :
بازگشت