DocumentCode :
3775700
Title :
C-GEP: 100 Gbit/s capable, FPGA-based, reconfigurable networking equipment
Author :
P?l Varga;L?szl? Kov?cs;Tam?s T?thfalusi;P?ter Orosz
Author_Institution :
AITIA International Inc., Telecommunication Division, Budapest, Hungary
fYear :
2015
fDate :
7/1/2015 12:00:00 AM
Firstpage :
1
Lastpage :
6
Abstract :
Programmable networking platforms are in the spotlight since the advent of SDN (Software Defined Networking). It is a great challenge to create such a platform - especially with reconfigurable hardware and line-rate capabilities reaching and exceeding 100 Gbit/s. These requirements together put FPGA (Field Programmable Gate Array) technology into the focus of high performance networking. In this paper, we introduce a highly flexible, programmable, multi-purpose networking platform, which is capable of hosting multiple 1 and 10 Gbit/s Ethernet interfaces - beside their 40 or 100 Gbit/s interface. The hardware of the introduced C-GEP platform is reconfigurable, even on-the-fly; due to the FPGA technology. C-GEP can host a wide range of high-speed network specific applications - including monitoring, switching and media conversion -, and it is aligned with the SDN principles. The system consists of two main building blocks: a high performance FPGA-based custom specific hardware platform and the firmware tailored to the actual task. The architecture is briefly introduced by its hardware and firmware setup, then some of the core functionalities, such as packet processing, filtering, and switching are presented.
Keywords :
"Monitoring","Field programmable gate arrays","Switches","Hardware","Computer architecture","Routing","Synchronization"
Publisher :
ieee
Conference_Titel :
High Performance Switching and Routing (HPSR), 2015 IEEE 16th International Conference on
Electronic_ISBN :
2325-5609
Type :
conf
DOI :
10.1109/HPSR.2015.7483084
Filename :
7483084
Link To Document :
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