Novel gate-all around triangular channel horizontal nanowire field-effect transistor for low power memories

This paper proposes a novel gate-all around (GAA) triangular channel horizontal nanowire field-effect transistor (HNWFET) for future low power memories. As the cross-sectional dimensions of nanowire channel are very small, an enhanced electrostatic controllability and carrier mobility characteristics are achieved. Ion, Ioff and the ratio Ion/Ioff have been chosen as the figure of merit to optimize the triangular channel HNWFET considering the parameters such as channel length, channel doping and temperature. The subthreshold slope (SS), Drain Induced Barrier Lowering (DIBL) and other device performance parameters are observed for optimized channel length using three-dimensional technology computer-aided design (TCAD). Our results show that reduction in channel length yields better ON-state and OFF-state characteristics with Ion as high as 0.0284mA and Ioff as low as 0.24pA.