• DocumentCode
    3777801
  • Title

    On using ABC for deriving distinguishing sequences for Verilog-descriptions

  • Author

    Natalia Kushik;Nina Yevtushenko;Stanislav N. Torgaev;Nikita Shatilov

  • Author_Institution
    Tomsk State University, Tomsk, Russia
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    In this paper, we discuss how a software ABC can be effectively used to derive distinguishing sequences for Verilog-descriptions. A set of these sequences can serve as a test suite for a digital device that is designed based on the corresponding Verilog-description using the FPGA technology. The paper contains a methodology for such test derivation technique, as well as technical details about the use of the tool and necessary commands. ABC can be easily downloaded from its official web site, and an interested reader can always repeat these experiments or apply this technology for more serious industrial need.
  • Keywords
    "Hardware design languages","Logic gates","Hardware","Circuit faults","Combinational circuits","Field programmable gate arrays","Automata"
  • Publisher
    ieee
  • Conference_Titel
    East-West Design & Test Symposium (EWDTS), 2015 IEEE
  • Type

    conf

  • DOI
    10.1109/EWDTS.2015.7493150
  • Filename
    7493150