The design and implementation of baseband predistorter based on FPGA and ARM

In satellite communications, the linearity and efficiency of power amplifier are two mutual restrictive characteristics. Traditionally, back-off method is used to achieve a satisfied linearity zone, but its efficiency is too low. Depending on digital signal processing technology, baseband digital predistorter(DPD) is used in power amplifier system step by step. In that circumstances, power amplifier systems are highly efficient and nicely linear. This paper presents a general architecture of transmitter with predistorter, and a baseband digital predistorter based on FPGA and ARM is implemented. Indirect learning structure is chosen for off-line operation, while memory polynomial model is selected for low complexity. Lagrange interpolation and cross-covariance methods are used to align the input and output data, and least square is used to obtain the parameters of predistorter. Experimental results demonstrate that a notable improvement of performance is achieved when power amplifier has less output back off power.