Title :
High-speed realization of trivium based on multi-core cryptographic processor
Author :
Zhou Chuang Wang;Zi Bin Dai
Author_Institution :
Department of Microelectronics, Zhengzhou Institute of Information Science and Technology, Zhengzhou, 450000, China
Abstract :
Trivium, based on block cipher and oriented towards hardware, is a synchronous sequence cipher algorithm which not only applies to resource-constrained environment, but also is suitable for the environment requiring encrypting information quickly. Having studied the characteristics of Trivium and considered the features of multi-core cryptographic processor, this paper proposed a high speed mapping framework on multi core. Meanwhile, we also pay attention to how to split Trivium into multi-core, and give the mapping framework of splitting Trivium into three cores. At the same time, after analyzing its disadvantages, this paper proposed a mapping framework of splitting into double cores. According to these different mapping frameworks, their corresponding throughputs are evaluated, and the results show that the mapping frameworks can quickly realize Trivium.
Keywords :
"Multicore processing","Ciphers","Throughput","Registers","Hardware","Boolean functions"
Conference_Titel :
ASIC (ASICON), 2015 IEEE 11th International Conference on
Print_ISBN :
978-1-4799-8483-1
Electronic_ISBN :
2162-755X
DOI :
10.1109/ASICON.2015.7517000