DocumentCode :
3781376
Title :
A flexible HEVC intra mode decision hardware for 8kx4k real time encoder
Author :
Yanheng Lu;Wei Cheng;Leilei Huang;Xiaoyang Zeng;Yibo Fan
Author_Institution :
Department of Microelectronics, Fudan University, Shanghai 200433, China
fYear :
2015
Firstpage :
1
Lastpage :
4
Abstract :
High Efficiency Video Coding (HEVC) is the next generation of video coding standard. Comparing with 9 intra prediction modes in H.264, 35 prediction modes are adopted in HEVC, which significantly increase the encoding complexity, especially for hardware implementation. This paper proposes a flexible HEVC intra mode decision hardware only employing the original pixels. With TSMC 65nm CMOS technology, the proposed mode decision accelerator achieves 622MHz working frequency at the cost of 59.5K gates. Our design can fulfill the throughput requirement of 7680×4320@30fps real time encoding with acceptable performance loss.
Keywords :
"Hardware","Encoding","Algorithm design and analysis","Throughput","Computer architecture","Complexity theory"
Publisher :
ieee
Conference_Titel :
ASIC (ASICON), 2015 IEEE 11th International Conference on
Print_ISBN :
978-1-4799-8483-1
Electronic_ISBN :
2162-755X
Type :
conf
DOI :
10.1109/ASICON.2015.7517190
Filename :
7517190
Link To Document :
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