DocumentCode :
3782817
Title :
Computationally efficient parametric yield estimation of linear electronic circuits
Author :
T. Ilic;V.B. Lirovski
Author_Institution :
Fac. of Electron. Eng., Nis Univ., Serbia
Volume :
2
fYear :
2000
Firstpage :
683
Abstract :
This paper recommends a new efficient method for statistical analysis of linear electronic circuits, when elements tolerances are given. The method copes with small and large tolerance values equally. Only one LU factorization of system matrix as whole is necessary, for each frequency/time point. Tolerance simulator was developed on the bases of this method, including graphical postprocessor suitable for observing statistical characteristics, and yield of a circuit.
Keywords :
"Yield estimation","Electronic circuits","Circuit simulation","Circuit faults","Analytical models","Equations","Statistical analysis","Production","Computational modeling","Circuit analysis"
Publisher :
ieee
Conference_Titel :
Microelectronics, 2000. Proceedings. 2000 22nd International Conference on
Print_ISBN :
0-7803-5235-1
Type :
conf
DOI :
10.1109/ICMEL.2000.838781
Filename :
838781
Link To Document :
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