• DocumentCode
    378343
  • Title

    A 1700 V LPT-CSTBT with low loss and high durability

  • Author

    Motto, Eric ; Donlon, John ; Nakagawa, Tsutomu ; Ishimura, Youichi ; Satoh, Katsumi ; Yamada, Junji ; Yamamoto, Masanori ; Kusunoki, Shigeru ; Nakamura, Hideki ; Nakamura, Katsumi

  • Author_Institution
    Powerex Inc., Youngwood, PA, USA
  • Volume
    1
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    173
  • Abstract
    This paper describes a new 1700 V power device based on a wide cell pitch carrier stored trench bipolar transistor (CSTBT). The new chip also utilizes a light punch through (LPT) vertical structure that is produced using low cost single crystal (nonepitaxial) wafer material. The device is optimized to provide the best trade-off between losses and ruggedness for industrial power conversion applications. A new gate process that enhances the reliability of the gate isolation film is another key technology utilized in the development of this device. The new 1700 V device demonstrates the successful extension of technologies previously used for 1200 V CSTBT devices to higher blocking voltages
  • Keywords
    insulated gate bipolar transistors; isolation technology; power bipolar transistors; 1700 V; carrier stored trench bipolar transistor; gate isolation film reliability; gate process; industrial power conversion; light punch through vertical structure; losses/ruggedness trade-off; plugged cell merged structure; short circuit ruggedness; single crystal wafer material; Bipolar transistors; Capacitance; Costs; Crystalline materials; Insulated gate bipolar transistors; Isolation technology; MOSFET circuits; Power conversion; Ultra large scale integration; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Applied Power Electronics Conference and Exposition, 2002. APEC 2002. Seventeenth Annual IEEE
  • Conference_Location
    Dallas, TX
  • Print_ISBN
    0-7803-7404-5
  • Type

    conf

  • DOI
    10.1109/APEC.2002.989244
  • Filename
    989244