A unified approach to compact modeling of power and logic devices in low-cost nMOS-based smart power technology

In this work we present a simple approach to model logic and power devices implemented by using a low cost nMOS-based smart power technology. The proposed compact model is able to describe the DC operation of the power driver, by exploiting a parameter set which does not need to be extracted on the driver itself, with the exception of the only drain-source parasitic resistances. This feature allows for simplicity of the design kit and speed of simulation, and a reasonably fast updating of the model from a technology to a new one. Moreover, experimental data from standard test structures are exploited for parameter extraction and comparison with the simulations