DocumentCode
3784255
Title
A memory specific notation for fault modeling
Author
Z. Al-Ars;A.J. Van de Goor;J. Braun;D. Richter
Author_Institution
Fac. of Inf. Technol. & Syst., Delft Univ. of Technol., Netherlands
fYear
2001
fDate
6/23/1905 12:00:00 AM
Firstpage
43
Lastpage
48
Abstract
This paper shows the shortcomings of the current, generic notation for fault models and extends it to allow the description of fault models for DRAMs. The advantage is that the extended fault models can easily be translated into operation sequences and tests that detect the described fault. Examples are given to show that the new notation results in optimized, memory specific, tests that have a shorter run time for a given fault coverage.
Keywords
"Testing","Random access memory","Fault detection","Stress","Read-write memory","SPICE","Information technology","Fault diagnosis","Temperature sensors","Voltage"
Publisher
ieee
Conference_Titel
Test Symposium, 2001. Proceedings. 10th Asian
ISSN
1081-7735
Print_ISBN
0-7695-1378-6
Type
conf
DOI
10.1109/ATS.2001.990257
Filename
990257
Link To Document