• DocumentCode
    3795600
  • Title

    Design Through Verilog HDL [Book Review]

  • Author

    G. Palumbo

  • Volume
    22
  • Issue
    4
  • fYear
    2006
  • Firstpage
    35
  • Lastpage
    35
  • Keywords
    "Book reviews","Hardware design languages","Circuit testing","Carbon nanotubes","Very large scale integration","Circuit simulation","Circuit synthesis","Thermal conductivity","Digital circuits","Ultra large scale integration"
  • Journal_Title
    IEEE Circuits and Devices Magazine
  • Publisher
    ieee
  • ISSN
    8755-3996
  • Type

    jour

  • DOI
    10.1109/MCD.2006.1708385
  • Filename
    1708385
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3795600