High speed LSI processing for the RSA cryptogram

In this work, we developed a high speed LSI for encoding and decoding the RSA cryptogram and describe the processing method in this paper. This cryptogram is used not only for encrypting data, but also for such purposes as authentication. However, the RSA encoding and decoding processes take a long time because they require a great deal of calculations. As a result, this cryptogram is not suited for practical use. In order to make a high-speed processing method, we introduce the following ideas: (1) to reduce the number of summation operations, we increase the number of coding bits used to represent a digit; (2) we propose a high-speed addition operation for handling the case in which each digit has a large number of bits; (3) we guarantee the value of modulo operations by determining the possible range and create parallel subtraction circuits as a result. By applying these concepts, we are able to reduce processing times compared to the previous methods. We also developed the LSI to realize our proposed algorithm.