CMOS circuit technology for precise GHz timing generator

Author

Okayasu, Toshiyuki ; Suda, Masakatsu ; Yamamoto, Kazuhiro

Author_Institution

ADVANTEST Corp., Gunma, Japan

fYear

2002

fDate

2002

Firstpage

894

Lastpage

902

Abstract

CMOS circuit technology to realize a high-precision GHz-timing-generator is described. The timing error factors in the CMOS circuit are explained and solutions are given. A reduced swing intra-chip interconnection method using "DC loaded circuitry" is proposed and its improvement effect of the wiring delay due to wiring capacitance and the suppression effect of the transitional change (noise) of IDD/ISS are described. A prototype chip of a dynamically-controllable-on-the-fly timing generator was fabricated in a 0.25 μm CMOS process. An output rate of 1.066 GHz max., timing control rate 1.066 GHz, delay INL +/-8ps, random jitter 1.5 ps rms and total deterministic jitter 20 ps p-p were achieved.

Keywords

CMOS digital integrated circuits; delay circuits; high-speed integrated circuits; low-power electronics; pulse generators; timing circuits; 0.25 micron; 1.066 GHz; CMOS circuit technology; DC loaded circuitry; GHz timing generator; high precision timing generator; reduced swing intra-chip interconnection method; timing error factors; variable delay generator; wiring capacitance; wiring delay; CMOS technology; Capacitance; Circuit noise; Delay effects; Integrated circuit interconnections; Jitter; Noise reduction; Prototypes; Timing; Wiring;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 2002. Proceedings. International

ISSN

1089-3539

Print_ISBN

0-7803-7542-4

Type

conf

DOI

10.1109/TEST.2002.1041844

Filename

1041844