Copper losses in power integrated inductors on silicon

One of the major goals in power electronics is the integration of the passive and active part of converters, on the same piece of silicon. In this context, our laboratory works on magnetic components integration. To have the right dimensioning of these components, we firstly have to choose the best topology regarding losses. The aim of this paper is to present a comparison between three circular topologies of integrated power inductors on silicon-regarding their copper losses. 2D FEA simulations have been made to compare the three topologies, and a complement of the Dowell method has been developed to obtain an analytical formulation of copper losses for the structure called 0LT in this paper (copper spiral sandwiched between two magnetic plates).