A manpack portable LPC 10 vocoder

A manpack portable LPC-10 Vocoder has been developed which makes substantial size and power performance improvements over existing LPC Vocoders. This is accomplished through the use of distributed processing using the latest VLSI digital signal processing technology and advanced microcomputer technology. First the LPC-10 standard algorithm was partitioned into high performance digital signal processing tasks that may stand alone as VLSI devices. The remaining LPC-10 algorithmic components are partitioned by the data and process flow graphs into meaningful multi-purpose stand alone single chip computers, resulting in a vocoder that uses 3 VLSI, and 3 LSI components. The digital signal processing algorithms are partitioned as follows: LPC Analysis IC, LPC Synthesis IC, AMDF Pitch Extraction IC. The data flow processes are partitioned into microcomputers as follows: Transmit Pitch and Voicing in processor #1, Transmit AGC in processor #2, and Parameter Quantization and Serialization in processor #3; in the receive mode sync acquisition and maintenance and parameter deserialization in processor #3, error correction and dequantization in processor #2, and interpolation rule implementation in processor #1. The data flow processor´s partitions were greatly affected by the use of single chip computers. These computers have a very limited RAM and ROM space causing the partition to be dependent on program size. The use of single chip computers minimizes external hardware necessary for the vocoder implementation.