• DocumentCode
    390722
  • Title

    Robust space compaction of test responses

  • Author

    Dmitriev, Alexej ; Gossel, Michael ; Chakrabarty, Krishnendu

  • Author_Institution
    Inst. for Comput. Sci., Univ. of Potsdam, Germany
  • fYear
    2002
  • fDate
    18-20 Nov. 2002
  • Firstpage
    254
  • Lastpage
    259
  • Abstract
    Presents the design of robust space compactors for reducing test data volume. These compactors are totally error-propagating for a given test test set, i.e. all possible errors are propagated irrespective of the fault model. In addition, these compactors also provide a high degree of error propagation for other test sets. All errors that affect up to three outputs of the circuit under test, as well as all errors that affect an odd number of outputs, are detected. This is irrespective of the test set or the fault model. The number of compactor outputs grows very slowly with the number of circuit outputs and size of the test set. Finally, no structural information of the circuit under test is required for fault simulation. We present experimental results on compactor design for a set of ISCAS and ITC-99 benchmark circuits.
  • Keywords
    built-in self test; fault simulation; logic simulation; logic testing; ISCAS benchmark circuits; ITC-99 benchmark circuits; built-in self test; circuit outputs; fault model; fault simulation; robust space compaction; space compactors; structural information; test data volume; test responses; totally error-propagating compactor; Benchmark testing; Circuit faults; Circuit simulation; Circuit testing; Compaction; Computer errors; Computer science; Error analysis; Robustness; Shift registers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium, 2002. (ATS '02). Proceedings of the 11th Asian
  • ISSN
    1081-7735
  • Print_ISBN
    0-7695-1825-7
  • Type

    conf

  • DOI
    10.1109/ATS.2002.1181720
  • Filename
    1181720