Implementation of 3D-DCT based video encoder/decoder system

Author

Bakr, M. ; Salama, A.E.

Author_Institution

Dept. of Electron. & Commun. Eng., Cairo Univ., Giza, Egypt

Volume

2

fYear

2002

fDate

4-7 Aug. 2002

Abstract

A 3D-DCT technique is used in video systems to eliminate the need for motion vector computations in the encoder or motion compensation computations in the decoder. This paper focuses on the hardware implementation of the video encoder/decoder system design. A complete design of the quantizer and VLC in the encoder side as well as the design of the dequantizer and VLD in the decoder side are implemented to complete the system. Finally, the system is targeted on one of the well-known field programmable gate arrays (FPGAs) provided by ALTERA Corp. and simulated using sample inputs.

Keywords

circuit simulation; data compression; discrete cosine transforms; field programmable gate arrays; logic design; quantisation (signal); video coding; 3D-DCT technique; FPGA; compression systems; decoder VLD; decompression systems; dequantizer; encoder VLC; hardware implementation; quantizer; video encoder/decoder system; Decoding; Digital cameras; Discrete cosine transforms; Equations; Field programmable gate arrays; Hardware; Image coding; Motion compensation; Real time systems; Video compression;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on

Print_ISBN

0-7803-7523-8

Type

conf

DOI

10.1109/MWSCAS.2002.1186785

Filename

1186785