On Pairing of Bipolar RRAM Memory With NPN Selector Based on Set/Reset Array Power Considerations

In this paper, we present a methodology of choosing an NPN selector (1S) for a given memory element (1M) to form a cross point (consisting of the memory element in series with the selector-1S1M) based on the overall array power efficiency requirements. This methodology is based on extensive TCAD simulations that show excellent match with our experimentally demonstrated n+/p/n+ epitaxial Si punch-through diode as selector (NPN selector) for symmetric bipolar resistive RAM. Using a TCAD validated circuit model of the NPN selector, we derive an equivalent circuit model for the cross point. For an exemplary selector design, our model suggests that the power P_xp dissipated in the cross point during set operation obeys the relationship P_xp ∝ V_set^0.5 I_set^1.25, even though the power dissipated in the memory element P_memory is V_setI_set. This shows that lowering the set current I_set of the memory element leads to a larger reduction in array power than lowering the set voltage V_set.