Optical flow extraction based on reuse of intermediate results and VLSI implementation

Author

Hariyama, M. ; Kameyama, M.

Author_Institution

Graduate Sch. of Inf. Sci., Tohoku Univ., Sendai, Japan

Volume

3

fYear

2002

fDate

5-7 Aug. 2002

Firstpage

1845

Abstract

High-speed optical flow extraction plays an important role in real-world systems such as highly safe vehicles. This paper presents a VLSI-oriented algorithm to reduce a computational amount based on reuse of intermediate results. Moreover, a functional unit allocation for a simple interconnection network between processing elements is also proposed based on analysis of data dependency. The performance of the VLSI processor designed in a 0.35μm CMOS technology is more than 10 000 times higher than that of a microprocessor (Pentium III 550MHz).

Keywords

CMOS integrated circuits; VLSI; high level synthesis; image sequences; CMOS technology; Intel Pentium III 550MHz; VLSI implementation; functional unit allocation; high-level synthesis; highly safe vehicles; intermediate results reuse; optical flow extraction; processing elements; CMOS technology; Data analysis; Data mining; High speed optical techniques; Image motion analysis; Multiprocessor interconnection networks; Optical interconnections; Optical network units; Vehicle safety; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

SICE 2002. Proceedings of the 41st SICE Annual Conference

Print_ISBN

0-7803-7631-5

Type

conf

DOI

10.1109/SICE.2002.1196602

Filename

1196602