Evaluation of timing recovery schemes for asymmetrical digital subscriber line (ADSL)

This paper proposes a practical evaluation methodology for timing recovery mechanisms in ADSL systems. The proposed methodology decouples the generation of timing imperfections to transform a closed-loop problem into a more tractable open-loop system. This results in a simpler and less computational intensive evaluation methodology as compared to detailed time domain simulations. We demonstrate the versatility of the proposed methodology by evaluating three timing recovery mechanisms, one based on a voltage controlled crystal oscillator (VCXO) and two jitter-based mechanisms. The first jitter-based approach applies all the jitters in the same instant while the second distributes the jitters over time. We also study the effect of non-ideal system behavior, like clock jitter, using the same framework.