DocumentCode
396133
Title
A CMOS neural oscillator using negative resistance
Author
Song, Han Jung ; Harris, John G.
Author_Institution
Dept. of Electron. Eng., Chung Cheong Coll., Chung-Buk, South Korea
Volume
3
fYear
2003
fDate
25-28 May 2003
Abstract
A CMOS neural oscillator using negative resistance has been designed and fabricated in an AMI 0.5 μm double poly technology through MOSIS. The proposed neural oscillator consists of a nonlinear resistor with negative resistance as well as standard OTAs and capacitors. Simulations of a network of oscillators demonstrate cooperative computation. Measurements of the fabricated oscillator chip confirm the input-gated oscillatory behavior of the cell.
Keywords
CMOS analogue integrated circuits; coupled circuits; feedback oscillators; negative resistance circuits; neural chips; 0.5 micron; CMOS; MOSIS; OTAs; cooperative computation; double poly technology; fabricated oscillator chip; input-gated oscillatory behavior; negative resistance; neural oscillator; nonlinear resistor; Brain modeling; Capacitors; Circuit simulation; Computational modeling; Computer networks; Equations; Mathematical model; Oscillators; Resistors; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN
0-7803-7761-3
Type
conf
DOI
10.1109/ISCAS.2003.1204978
Filename
1204978
Link To Document