DocumentCode
396419
Title
A self-calibration technique for time-interleaved pipeline ADCs
Author
Hakkarainen, Vaino ; Sumanen, Lauri ; Aho, Mikko ; Waltari, Mikko ; Halonen, Kari
Author_Institution
Electron. Circuit Design Lab., Helsinki Univ. of Technol., Finland
Volume
1
fYear
2003
fDate
25-28 May 2003
Abstract
In this paper, an effective digital self-calibration method for time-interleaved parallel pipeline ADCs is presented. The method corrects errors of MDACs within the channel ADCs and compensates gain and offset mismatches between parallel channels. According to simulations, 14-bit accuracy can be achieved with 10-bit device matching.
Keywords
analogue-digital conversion; calibration; pipeline processing; 10 bit; MDAC; digital self-calibration; error correction; gain compensation; offset mismatch; time-interleaved parallel pipeline ADC; Bit rate; Calibration; Capacitors; Electronic circuits; Error correction; Laboratories; Pipelines; Sampling methods; Timing; Wireless communication;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN
0-7803-7761-3
Type
conf
DOI
10.1109/ISCAS.2003.1205691
Filename
1205691
Link To Document