• DocumentCode
    396442
  • Title

    Cost-oriented design of a 14-bit current steering DAC macrocell

  • Author

    Starzyk, Janusz A. ; Mohn, Russell P.

  • Author_Institution
    Ohio Univ., Athens, OH, USA
  • Volume
    1
  • fYear
    2003
  • fDate
    25-28 May 2003
  • Abstract
    This paper presents the design concept and implementation of a 14-bit current steering DAC macrocell for a SoC in 0.13 μm CMOS. The design approach minimizes total fabrication cost of the SoC. The paper demonstrates that using this approach smaller and economically efficient DACs will result without a loss to specified design requirements.
  • Keywords
    CMOS integrated circuits; digital-analogue conversion; errors; integrated circuit design; integrated circuit yield; statistical analysis; system-on-chip; 0.13 micron; 14 bit; CMOS SoC; cost-oriented design; current steering DAC macrocell; statistical yield model; CMOS technology; Costs; Dynamic range; Fabrication; Macrocell networks; Manufacturing; Modems; Semiconductor device modeling; Signal design; System-on-a-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
  • Print_ISBN
    0-7803-7761-3
  • Type

    conf

  • DOI
    10.1109/ISCAS.2003.1205726
  • Filename
    1205726
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=396442