Title :
Fast implementations of Montgomery´s modular multiplication algorithm
Author_Institution :
Res. & Dev., I.T.I.Ltd., Bangalore, India
Abstract :
In this paper, techniques for fast implementations of Montgomery´s modular multiplication algorithm are described. These use non-redundant multi-bit recoding. These are compared regarding the area and computation requirements and compared with conventional implementation.
Keywords :
carry logic; digital arithmetic; Montgomery´s modular multiplication algorithm; area; computation requirements; nonredundant multi-bit recoding; Research and development; Yield estimation;
Conference_Titel :
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN :
0-7803-7761-3
DOI :
10.1109/ISCAS.2003.1205789
