Allpass structures for multiplierless realization of recursive digital filters

Under certain conditions an odd-order lowpass or highpass recursive digital filter can be decomposed into a sum of two allpass filters with real coefficients exhibiting a low passband sensitivity. This decomposition has the attractive property that there exist for its implementation structures where both the number of delays and the number of multipliers are equal to the filter order, thereby making the overall implementation very efficient. This paper develops some allpass structures that combine this property for generating multiplierless implementations for odd-order recursive digital filters. Utilizing these structures along with allowing some marginally insignificant deviations in the specifications such as in the passband and stopband tolerances, the total number of nonzero bits for multiplier coefficients, i.e., those of shifts and adds and/or subtracts, becomes quite small, making this approach very attractive. Alternatively, the overall filter can be designed with marginally stricter tolerances than the desired specifications in such a manner that it meets the criteria after quantizing the filter coefficients.