Title :
Utilizing various ADL facets for instruction level CPU test
Author :
Safi, Elham ; Karimi, Zohreh ; Abbaspour, Maghsoud ; Navabi, Zainalabedin
Author_Institution :
Electr. & Comput. Eng., Tehran Univ., Iran
Abstract :
As the use of general and special processors as embedded cores in SoC designs increases, developing high quality test programs for them is becoming more important. Software-based self-test methodologies seem a promising way in this arena. Our test method is based on exercising all operations of processor components using macros that justify test values and propagate the results to the component outputs. We use precomputed deterministic test sets for internal components of processor to generate an efficient test program. Generation of the macros require instruction set and data transfer path information. This and other required information are available in the processor´s architecture description language (ADL) specification, which can be provided by the processor core developer as a supplementary deliverable. We have applied our test program generation to a simple 16-bit processor to demonstrate steps involved in our approach for extraction of a test program from an ADL description.
Keywords :
automatic test pattern generation; formal verification; instruction sets; macros; specification languages; system-on-chip; ADL; SoC design; formal specification; instruction set; macros; precomputed deterministic test set; processor architecture description language; software-based self-test; system-on-chip; test program generation; Architecture description languages; Automatic testing; Built-in self-test; Costs; Data mining; Hardware design languages; Registers; Signal analysis; Software testing; System-on-a-chip;
Conference_Titel :
Microprocessor Test and Verification: Common Challenges and Solutions, 2003. Proceedings. 4th International Workshop on
Print_ISBN :
0-7695-2045-6
DOI :
10.1109/MTV.2003.1250261