Multi-granularity metrics for the era of strongly personalized SOCs

Author

Moullec, Y. Le ; Amor, N. Ben ; Diguet, J-Ph ; Abid, M. ; Philippe, J.-L.

Author_Institution

Univ. de Bretagne Sud, Lorient, France

fYear

2003

fDate

2003

Firstpage

674

Lastpage

679

Abstract

This paper details the first step of the Design Trotter framework for design space exploration applied to dedicated SOCs. The aim of this step is to provide metrics in order to guide the designer and the synthesis tool towards an efficient application architecture matching. This work presents a computation of metrics at all levels of the application graph-based hierarchy. These metrics are computed through data and control dependency analysis. They quantify the memory, control and processing orientations as well as the average of parallelism for different granularities.

Keywords

circuit CAD; circuit optimisation; graph theory; integrated circuit design; system-on-chip; Design Trotter framework; application architecture matching; application graph-based hierarchy; control dependency analysis; design space exploration; multi-granularity metrics; parallelism; processing orientations; strongly personalized SOCs; synthesis tool; Bandwidth; Clocks; Communication channels; Design optimization; Frequency; Hardware; Parallel processing; Pipelines; Process control; Space exploration;

fLanguage

English

Publisher

ieee

Conference_Titel

Design, Automation and Test in Europe Conference and Exhibition, 2003

ISSN

1530-1591

Print_ISBN

0-7695-1870-2

Type

conf

DOI

10.1109/DATE.2003.1253685

Filename

1253685