• DocumentCode
    400670
  • Title

    Partial core encryption for performance-efficient test of SOCs

  • Author

    Sinanoglu, Ozgur ; Orailoglu, Alex

  • Author_Institution
    Dept. of Comput. Sci. & Eng., California Univ., La Jolla, CA, USA
  • fYear
    2003
  • fDate
    9-13 Nov. 2003
  • Firstpage
    91
  • Lastpage
    94
  • Abstract
    The isolation of a core through full I/O scan helps ease SOC test challenges; yet the performance of high-speed SOCs is significantly hampered. We propose a partial core encryption methodology wherein the core vendor unveils only a small part of the core logic, successfully satisfying core IP protection requirements. Once the partially encrypted cores are merged into an SOC, the system integrator performs test generation on the visible SOC logic only, greatly reducing the test generation effort expended. By utilizing the test data provided by the core vendor as well, the SOC integrator can test the SOC with no performance degradation. We present an efficient fault analysis based core encryption algorithm which is guided by judiciously computed testability measures. The experimental results confirm the significantly high encryption levels attained by the proposed encryption algorithm.
  • Keywords
    cryptography; logic testing; system-on-chip; SOC integrator; SOC test; core IP protection; core encryption algorithm; core logic; fault analysis; partial core encryption; system on chip; Circuit testing; Computer science; Cryptography; Degradation; Logic testing; Performance evaluation; Permission; Protection; System testing; System-on-a-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Aided Design, 2003. ICCAD-2003. International Conference on
  • Conference_Location
    San Jose, CA, USA
  • Print_ISBN
    1-58113-762-1
  • Type

    conf

  • DOI
    10.1109/ICCAD.2003.159675
  • Filename
    1257592