Title :
USJ process requirements on low energy doping and spike anneal for production for 90 nm node CMOS LOGIC
Author :
Nakao, Hayato ; Momiyama, Youichi ; Kase, M. ; Ito, H. ; Matsunaga, Yusuke
Abstract :
Ultra Shallow Junction (USJ) for Source Drain Extension (SDE) required from ITRS road map becomes shallower toward sub 10 nm beyond 90-nm node. The 45 nm node USJ for n-MOS was first demonstrated using heavy mass dopant of Antimony. In p-MOS case, by examining the pre-acceleration energy dependence of device performance in differential mode implant, we showed deep sub-keV energy contamination less high current implanter is necessary for high-end n-MOS beyond 90-nm node.
Keywords :
CMOS logic circuits; antimony; ion implantation; semiconductor doping; 90 nm; 90 nm node CMOS LOGIC; ITRS road map; USJ process requirements; deep sub-keV energy contamination; device performance; differential mode implant; heavy mass dopant; high current implanter; low energy doping; pre-acceleration energy dependence; source drain extension; spike anneal; ultra shallow junction; CMOS logic circuits; CMOS process; Doping; Implants; Laboratories; Logic devices; Production; Rapid thermal annealing; Roads; Surface resistance;
Conference_Titel :
Ion Implantation Technology. 2002. Proceedings of the 14th International Conference on
Conference_Location :
Taos, New Mexico, USA
Print_ISBN :
0-7803-7155-0
DOI :
10.1109/IIT.2002.1257963