DocumentCode
403613
Title
Pattern selection for testing of deep sub-micron timing defects
Author
Mango ; Chao, C.-T. ; Wang, Li-C ; Cheng, Kwang-Ting
Author_Institution
Dept. of Electr. Comput. Eng., California Univ., Santa Barbara, CA, USA
Volume
2
fYear
2004
fDate
16-20 Feb. 2004
Firstpage
1060
Abstract
Due to process variations in deep sub-micron (DSM) technologies, the effects of timing defects are difficult to capture. This paper presents a novel coverage metric for estimating the test quality with respect to timing defects under process variations. Based on the proposed metric and a dynamic timing analyzer, we develop a pattern-selection algorithm for selecting the minimal number of patterns that can achieve the maximal test quality. To shorten the run time in dynamic timing analysis, we propose an algorithm to speed up the Monte-Carlo-based simulation. Our experimental results show that, selecting a small percentage of patterns from a multiple-detection transition fault pattern set is sufficient to maintain the test quality given by the entire pattern set. We present run-time and accuracy comparisons to demonstrate the efficiency and effectiveness of our pattern selection framework.
Keywords
Monte Carlo methods; digital simulation; fault simulation; statistical analysis; timing; Monte-Carlo based simulation; coverage metric; deep submicron timing defects testing; dynamic timing analyzer; multiple detection transition fault pattern set; pattern selection; statistical analysis; Algorithm design and analysis; Analytical models; Automatic test pattern generation; Chaos; Circuit faults; Circuit simulation; Delay effects; Pattern analysis; Testing; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings
ISSN
1530-1591
Print_ISBN
0-7695-2085-5
Type
conf
DOI
10.1109/DATE.2004.1269033
Filename
1269033
Link To Document