Title :
Using a communication architecture specification in an application-driven retargetable prototyping platform for multiprocessing
Author :
Zhu, Xinping ; Malik, Sharad
Author_Institution :
Dept. of Electr. Eng., Princeton Univ., NJ, USA
Abstract :
In multiprocessor based SoCs, optimizing the communication architecture is often as important, if not more important, than optimizing the computation architecture. While there are mature platforms and techniques for the modeling and evaluation of architectures of processing elements, the same is not true for the communication architectures. This paper presents an application-driven retargetable prototyping platform which fills this gap. This environment aims to facilitate the design exploration of the communication sub-system through application-level execution-driven simulations and quantitative analysis. First, we introduce an expressive communication architecture specification which gives the designers the freedom to choose and configure their custom interconnection schemes over a wide range of communication architectures, covering the spectrum from buses to packet switching networks. This, combined with a distributed application model, drives a modular modeling and simulation environment that permits detailed simulation of the communication (and computation) architectures at the application level. Through the case studies motivated by an embedded system application, we show that through simulations, critical system information such as timings and communication patterns can be obtained and evaluated. Consequently, system-level design choices regarding the communication architecture can be made with high confidence in the early stages of design. In addition to improving design quality, this methodology also results in significantly shortening design-time.
Keywords :
integrated circuit design; integrated circuit modelling; multiprocessor interconnection networks; packet switching; system-on-chip; SoC; application driven retargetable prototyping platform; application level execution driven simulation; communication architecture specification; communication pattern; communication subsystem; distributed application model; embedded system; integrated circuit design; integrated circuit modelling; interconnection scheme; modular modeling; multiprocessor; packet switching networks; quantitative analysis; system level design; system-on-chip; timing; Analytical models; Computational modeling; Computer architecture; Distributed computing; Drives; Embedded system; Packet switching; Prototypes; System-level design; Timing;
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings
Print_ISBN :
0-7695-2085-5
DOI :
10.1109/DATE.2004.1269066