• DocumentCode
    403665
  • Title

    Issues in implementing latency insensitive protocols

  • Author

    Casu, Mario R. ; Macchiarulo, Luca

  • Author_Institution
    Dipt. di Elettronica, Politecnico di Torino, Italy
  • Volume
    2
  • fYear
    2004
  • fDate
    16-20 Feb. 2004
  • Firstpage
    1390
  • Abstract
    A design that works under the assumption of zero-delay connections between functional modules is modified in a latency insensitive design (LID) by encapsulating them within the wrappers ("shells") and connecting them through internally pipelined blocks ("relay stations") complying with a protocol that guarantees identity of behavior.
  • Keywords
    feedback; feedforward; protocols; system-on-chip; trees (mathematics); feedback; feedforward; functional modules; latency insensitive design; latency insensitive protocols; pipelined blocks; system-on-chip; trees; wrappers; Clocks; Delay; Joining processes; Proposals; Protocols; Registers; Relays; Signal generators; Throughput; Topology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings
  • ISSN
    1530-1591
  • Print_ISBN
    0-7695-2085-5
  • Type

    conf

  • DOI
    10.1109/DATE.2004.1269102
  • Filename
    1269102
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=403665