• DocumentCode
    403936
  • Title

    Design verification problems: test to the rescue?

  • Author

    Varma, Prab

  • Author_Institution
    Veritable Inc.
  • Volume
    1
  • fYear
    2003
  • fDate
    Sept. 30-Oct. 2, 2003
  • Firstpage
    1292
  • Lastpage
    1292
  • Keywords
    Automatic test pattern generation; Binary decision diagrams; Computer bugs; Fault detection; Formal verification; Integrated circuit modeling; Integrated circuit testing; Manufacturing processes; State-space methods; Virtual manufacturing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 2003. Proceedings. ITC 2003. International
  • ISSN
    1089-3539
  • Print_ISBN
    0-7803-8106-8
  • Type

    conf

  • DOI
    10.1109/TEST.2003.1271132
  • Filename
    1271132
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=403936