• DocumentCode
    4054
  • Title

    Nonuniform Multilevel Analog Routing With Matching Constraints

  • Author

    Hung-Chih Ou ; Hsing-Chih Chang Chien ; Yao-Wen Chang

  • Author_Institution
    Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan
  • Volume
    33
  • Issue
    12
  • fYear
    2014
  • fDate
    Dec. 2014
  • Firstpage
    1942
  • Lastpage
    1954
  • Abstract
    Symmetry, common-centroid, topology-matching, and length-matching constraints are four major routing considerations to improve the performance of an analog circuit. Symmetry constraints are specified to route matched nets symmetrically with respect to some common axes. Common-centroid constraints are also specified to route matched net symmetrically with respect to some common centers. Topology-matching constraints are commonly imposed on critical yet asymmetry nets with the same number of bends, vias, and wirelength. Length-matching constraints are specified to route the nets which have limited resources with the same wirelength. These four constraints can reduce current mismatches and unwanted electrical effects between two critical nets. In this paper, we propose the first work to simultaneously consider the four constraints for analog routing while minimizing total wirelength, bend numbers, via counts, and coupling noise at the same time. We first present a basic integer linear programming (ILP) formulation to simultaneously consider the four constraints for analog routing. Then, a prioritized-constraint-aware routing algorithm is proposed to assist analog designers for assigning the four matching constraints and optimizing routing topologies. Effective reduction techniques are also employed to reduce the numbers of ILP variables and constraints for the two routing algorithms. To further enhance the routing performance, a nonuniform multilevel routing framework is presented and integrated into our routing algorithms. Experimental results show that our approach can obtain better routing results and satisfy all specified routing constraints while optimizing circuit performance.
  • Keywords
    analogue integrated circuits; integer programming; linear programming; network routing; ILP formulation; analog circuit; analog designers; asymmetry nets; basic integer linear programming formulation; common-centroid matching; current mismatches; length-matching; nonuniform multilevel analog routing; nonuniform multilevel routing framework; prioritized-constraint-aware routing algorithm; reduction techniques; route matched nets symmetrically; routing topologies; symmetry matching; topology-matching; Algorithm design and analysis; Analog integrated circuits; Circuit synthesis; Noise; Routing; Steiner trees; Analog ICs; Physical Design; Routing; physical design; routing;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2014.2363394
  • Filename
    6930748